Energy-efficient Hybrid Optical-Electronic Network-on-Chip for Future Many-core Processors

On-chip Network-enabled Many-core Architectures

Partitioning the Network-on-Chip to Enable Virtualization on Many-Core Processors

Technological advances have increased the transistor density, thereby ushering in multiand more recently many-core systems, distinguished by the presence of hundreds of cores on a single chip. For such a platform, the Network-on-Chip (NoC) has emerged as a scalable and efficient interconnect fabric to realize the communication across an ever increasing number of processor cores, memories, and s...

Energy Efficiency of Many-Soft-Core Processors

The growing capacity of integration allows to instantiate hundreds of soft-core processors in a single FPGA to create a reconfigurable multiprocessing system. Lately, FPGAs have been proven to give a higher energy efficiency than alternative platforms like CPUs and GPGPUs for certain workloads and are increasingly used in datacenters. In this paper we investigate whether many-soft-core processo...

On-Chip Network Designs for Many-Core Computational Platforms

Processor designers have been utilizing more processing elements (PEs) on a single chip to make efficient use of technology scaling and also to speed up system performance through increased parallelism. Networks on-chip (NoCs) have been shown to be promising for scalable interconnection of large numbers of PEs in comparison to structures such as point-to-point interconnects or global buses. Thi...

Efficient Execution of Dependent Tasks on Many-Core Processors

The increasing performance requirements of safety-critical real-time embedded systems made traditional single-core architectures obsolete. Moving to more complex many-core systems requires new techniques and tools for the certification of the embedded software. Timing and functional behaviours are subject to specific requirements of certification guidelines such as D-178B/C for avionics and ISO...